Intel 41210 User Manual
Intel
®
41210 Serial to Parallel PCI Bridge Developer’s Manual
55
System Management Bus Interface
System Management Bus Interface
8
The SMBus interface allows the Intel
®
41210 Serial to Parallel PCI Bridge (called hereafter the
41210 Bridge or 41210) to serve as a slave device residing on the SMBus for system management
functions and provides for full access to the configuration registers in each function. The SMBus
implementation has the following characteristics:
functions and provides for full access to the configuration registers in each function. The SMBus
implementation has the following characteristics:
•
Is based on the System Management Bus Specification, Revision 2.0 (SMBus)
•
Allows for slave-mode operation only
•
Provides full read/write access to internal configuration and memory spaces
The SMBus address is set up on PERST# by sampling the SMBUS pins. When the pins are
sampled, the resulting address is assigned as shown in
sampled, the resulting address is assigned as shown in
:
Table 25.
SMBus Address Assignments
Bit
Value
7
1
6
1
5
SMBUS[5]
4
0
3
SMBUS[3]
2
SMBUS[2]
1
SMBUS[1]