Manuais de utilizador para Intel 31244 PCI-X

índice analítico

• Contents

  3
  • Figures

    5
    • Figure 1. Intel® 31244 PCI-X to Serial ATA Controller Block Diagram

      14
    • Figure 2. Quad Serial ATA Host Bus Adapter

      15
    • Figure 3. Packaging Considerations

      17
    • Figure 4. Package Information: 256-pin PBGA

      22
    • Figure 5. PBGA Mapped By Pin Function

      23
    • Figure 6. Examples of Stubless and Short Stub Traces

      25
    • Figure 7. Crosstalk Effects on Trace Distance and Height

      26
    • Figure 8. PCB Ground Layout Around Connectors

      26
    • Figure 9. Cross Section of Differential Trace

      29
    • Figure 10. LED and Serial EEPROM Configurations

      34
    • Figure 11. Intel® 31244 PCI-X to Serial ATA Controller Connection Scheme - Normal Mode

      38
    • Figure 12. Intel® 31244 PCI-X to Serial ATA Controller HBA Stackup

      39
    • Figure 13. Write Backplane Topology

      40
    • Figure 14. Read Backplane Topology

      41
    • Figure 15. Microstrip Stackup

      43
    • Figure 16. Stripline Stackup

      44
    • Figure 17. Single-Slot Topology

      52
    • Figure 18. Embedded Intel® 31244 PCI-X to Serial ATA Controller Design with Single PCI-X Load

      53
    • Figure 19. Embedded PCI-X Design With Multiple Loads

      54
    • Figure 20. Serial ATA Direct Connect

      55
    • Figure 21. Serial ATA Connectors Cable to Host Connections

      56
    • Figure 22. Serial ATA Host Connectors

      57
    • Figure 23. Serial ATA Cable Signal Connections

      58
    • Figure 24. Serial ATA Eye Diagram

      62
    • Figure 25. Extended Mode Receiver Example

      63
    • Figure 26. Extended Mode Driver Example

      64
    • Figure 27. Intel® IQ31244 PCI-X to Serial ATA Controller Evaluation Platform Board Block Diagram

      67
  • Tables

    6
    • Table 1. Reference Documents

      9
    • Table 2. Terminology and Definition (Sheet 1 of 3)

      9
    • Table 3. Serial ATA Signals Pin Descriptions

      18
    • Table 4. PCI-X Bus Pin Descriptions (Sheet 1 of 2)

      19
    • Table 5. Configuration Pin Descriptions

      20
    • Table 6. JTAG Pin Descriptions

      20
    • Table 7. Serial ROM Interface Pin Descriptions

      21
    • Table 8. Power Supply Pin Descriptions

      21
    • Table 9. Normal Voltage Mode

      33
    • Table 10. Extended Voltage Mode

      33
    • Table 11. Normal Voltage Mode

      38
    • Table 12. Motherboard Stackup, Microstrip

      42
    • Table 13. Motherboard Microstrip Parameters

      42
    • Table 14. Backplane Stripline Stackup

      44
    • Table 15. Backplane Stackup, Microstrip

      45
    • Table 16. Backplane Stackup, Offset Stripline

      45
    • Table 17. Cable Specification

      45
    • Table 18. PCI/X Voltage Levels

      47
    • Table 19. PCI-X Clocking Modes

      48
    • Table 20. Add-on Card Routing Parameters

      49
    • Table 21. PCI-X Slot Guidelines

      50
    • Table 22. Wiring Lengths for Single Slot

      52
    • Table 23. Wiring Lengths for Embedded Intel® 31244 PCI-X to Serial ATA Controller with Single PCI-X Load

      53
    • Table 24. Wire Lengths For Multiple PCI-X Load Embedded Intel® 31244 PCI-X to Serial ATA Controller Design

      54
    • Table 25. Serial ATA Signal Definitions

      55
    • Table 26. Interface Timing and SI Requirements

      61
    • Table 27. Timing Requirement

      62
    • Table 28. Extended Voltage Mode Receiver

      63
    • Table 29. Extended Mode Driver

      64
    • Table 30. Terminations: Pull-up/Pull-down (Sheet 1 of 2)

      65
    • Table 31. Logic Analyzer Pod 1 (Sheet 1 of 2)

      69
    • Table 32. Logic Analyzer Pod 2

      70
    • Table 33. Logic Analyzer Pod 3

      71
    • Table 34. Logic Analyzer Pod 4

      72
    • Table 35. Logic Analyzer Pod 5

      72
    • Table 36. Logic Analyzer Pod 6

      73
    • Table 37. Thermal Resistance

      77
    • Table 38. 544-Lead H-PBGA Package Thermal Characteristics

      77
    • Table 39. Design References

      79
    • Table 40. Intel Related Documentation

      79
    • Table 41. Electronic Information

      80
  • Revision History

    7
• About This Document 1

  9
  • 1.1 Reference Documentation

    9
  • 1.2 Terminology and Definitions

    9
• Overview 2

  13
  • 2.1 Features

    13
  • 2.2 Applications

    15
• Intel® 31244 PCI-X to Serial ATA Controller Package 3

  17
  • 3.1 Signal Pin Descriptions

    18
    • 3.1.1 VA0, VA1 (VCCPLL) Pin Requirements

      21
  • 3.2 Package/Marking Information

    22
  • 3.3 Ball Map By Function

    23
• Routing Guidelines 4

  25
  • 4.1 General Routing Guidelines

    25
  • 4.2 Crosstalk

    26
  • 4.3 EMI Considerations

    27
  • 4.4 Power Distribution and Decoupling

    28
    • 4.4.1 Decoupling

      28
      • 4.4.1.1 Intel® 31244 PCI-X to Serial ATA Controller Decoupling

        28
  • 4.5 Trace Impedance

    29
    • 4.5.1 Differential Impedance

      29
• Intel® 31244 PCI-X to Serial ATA Controller Interface Ports 5

  31
  • 5.1 Serial ROM Interface

    31
  • 5.2 JTAG Interface

    31
  • 5.3 PCI-X Interface

    32
  • 5.4 Serial ATA Interface

    33
    • 5.4.1 Direct Port Access (DPA)

      33
    • 5.4.2 Extended Voltage Mode

      33
    • 5.4.3 LED Interface

      34
    • 5.4.4 Reference Clock Generation

      35
• Printed Circuit Board (PCB) Methodology 6

  37
  • 6.1 Intel® 31244 PCI-X to Serial ATA Controller Normal Mode (standard SATA driver)

    38
    • 6.1.1 Intel® 31244 PCI-X to Serial ATA Controller HBA Stackup

      39
  • 6.2 Extended Voltage Mode

    39
    • 6.2.1 Backplane Topologies

      40
    • 6.2.2 Motherboard Stackup for Backplane Designs

      42
    • 6.2.3 Backplane Stripline Stackup

      44
    • 6.2.4 Cable Interconnect With Backplane

      45
• PCI-X Layout Guidelines 7

  47
  • 7.1 PCI Voltage Levels

    47
  • 7.2 PCI/X Clocking Modes

    48
  • 7.3 PCI General Layout Guidelines

    49
  • 7.4 PCI-X Layout Guidelines For Slot Configurations

    50
    • 7.4.1 Protection Circuitry for Add-in Cards

      50
    • 7.4.2 PCI Clock Layout Guidelines

      51
    • 7.4.3 Connecting Intel® 31244 PCI-X to Serial ATA Controller to Single-Slot

      52
    • 7.4.4 Embedded Intel® 31244 PCI-X to Serial ATA Controller Single PCI-X Load

      53
    • 7.4.5 Embedded Intel® 31244 PCI-X to Serial ATA Controller Design With Multiple PCI-X Loads

      54
• Cables and Connectors 8

  55
  • 8.1 Cabling

    55
    • 8.1.1 Serial ATA Cable

      58
• Voltage Power Delivery 9

  59
  • 9.1 Intel® 31244 PCI-X to Serial ATA Controller Core Supply Voltage: Providing 2.5 V in 3.3 V System

    59
• Test Methodology 10

  61
  • 10.1 Extended Voltage Mode

    63
    • 10.1.1 Extended Voltage Mode Receiver Model

      63
    • 10.1.2 Extended Voltage Mode Driver Model

      64
• Terminations: Pull-down/Pull-ups 11

  65
• Intel® IQ31244 PCI-X to Serial ATA Controller Evaluation Platform Board 12

  67
  • 12.1 Features

    68
• Debug Connectors and Logic Analyzer Connectivity 13

  69
  • 13.1 Probing PCI-X Signals

    69
• Design for Manufacturing 14

  75
• Thermal Solutions 15

  77
  • 15.1 Thermal Recommendations

    77
• References 16

  79
  • 16.1 Related Documents

    79
  • 16.2 Electronic Information

    80
• Intel® IQ31244 Controller Evaluation Platform Board Bill of Materials A

  81