User ManualTable of ContentsDefinitions and Abbreviations5Introduction61.1. What is TOPAS900 Flash?61.2. Key Features of TOPAS900 Flash Package6Let’s start with TOPAS900 Flash72.1. What is in the box?72.2. Unpacking72.3. A Glance at the TOPAS900 Flash Board82.4. Principe of Connection9Hardware Description103.1. Programming and Debugging Board10Firmware Processor10Power Supply10Status LEDs11Control Switches (Reset and NMI)11Serial Communication, Connector and Line Driver11Connector to Flash Carrier Board113.2. The Flash Carrier Board11The TMP95FY64F Microcontroller12512 kb Flash ROM - Toshiba TC58F400 (90 ns)13128 kb RAM - Toshiba TC551001 (70 ns)14Connector to Programming and Debugging Board14MCU Terminal Connectors14Jumpers14Software Description164.1. IAR Tools16Embedded Workbench16C-Spy Debugger/Simulator17C-Spy ROM-Monitor18IAR Tools Limitations184.2. Toshiba Tools19Compiler, Assembler, Linker, Converter19TMPro Debugger22TMPro ROM-Monitor25Toshiba Tool Limitations264.3. ROM-Monitor Memory Usage27IAR ROM-Monitor27Toshiba ROM-Monitor284.4. Restrictions of ROM-Monitor Usage29Functional Description305.1. Operating Modes30MCU Internal Memory Map30Internal Mapping in different Modes31Programming in Single Boot Mode31Normal Operation Mode325.2. Jumper Description34The jumpers of the Programming-Debugging Board34The jumpers of the Flash Carrier Board345.3. Programming of Flash Memory34Technical Sheets366.1. Board Schematics366.2. Component Print416.3. PCB Routing42Application Board43Electromagnetic Compatibility45Figure 1 : The TOPAS900 Flash Board (Top View)8Figure 2 : Breaking off TOPAS900 Flash Board from Flash Carrier Board9Figure 3 : Principe of Connection9Figure 4 : TMP95FY64 Schematic Block Diagram13Figure 5 : IAR Embedded Workbench Desktop with Project Window17Figure 6 : C-Spy Desktop with Source Code, Memory and Register Window19Figure 7 : TMPro Window22Figure 8 : Memory Usage of IAR ROM-Monitor27Figure 9 : Memory Usage of Toshiba ROM-Monitor28Figure 10 : The MCU's Internal Memory Map30Figure 11 : Internal Mapping in Single Boot and Single Chop Mode31Figure 12 : Map for Internal Flash Programming32Figure 13 : Memory Map for using external / internal Flash33Figure 14 : Flash Programmer Window35Figure 15 : Schematic Page 1 of 437Figure 16 : Schematic Page 2 of 438Figure 17 : Schematic Page 3 of 439Figure 18 : Schematic Page 4 of 440Figure 19 : Component Print – Top & Bottom View41Figure 20 : PCB Routing – Top & Bottom View42Figure 21 : The Application Board43Size: 1.15 MBPages: 45Language: EnglishOpen manual