Data SheetTable of Contents1. Introduction131.1 Chapter Outline131.2 Server Board Use Disclaimer132. Server Board Overview142.1 Server Board Feature Set142.2 Server Board Layout222.2.1 Server Board Mechanical Drawings233. Functional Architecture253.1 Processor Sub-System273.1.1 Processor Voltage Regulator Down (VRD)273.1.2 Reset Configuration Logic273.2 Intel® 3200/3210 Chipset283.2.1 Intel® 3200/3210 Chipset MCH: Memory Control Hub283.2.1.1 Segment F PCI Express* x8293.2.1.2 MCH Memory Sub-System Overview303.2.1.4 Memory Population Rules and Configurations303.2.2 PCI-X Hub (LX board SKU only)313.2.2.1 Segment E 64bit/133MHz PCI-X Subsystem313.2.2.1.1 Device IDs (IDSEL)313.2.2.1.2 Segment E Arbitration313.2.3 Intel® ICH9R: I/O Controller Hub 9R323.2.3.1 Direct Media Interface (DMI)323.2.3.2 Controller Link (M-Link)323.2.3.3 PCI Express* Interfaces323.2.3.4 Serial ATA II Interface323.2.3.5 PCI Interface323.2.3.6 Low Pin Count Interface (LPC)323.2.3.7 Compatibility Modules333.2.3.8 Universal Serial Bus (USB) Controller333.2.3.9 Real Time Clock (RTC)333.2.3.10 GPIO333.2.3.11 Enhanced Power Management333.2.3.12 System Management Interface343.2.3.13 Intel® Quiet System Technology (Intel® QST)343.2.3.14 Serial Peripheral Interface (SPI)343.2.3.15 Manageability363.2.3.16 Unused Intel® ICH9 Interfaces on the Server Board363.2.3.17 PCI Express* x4 Sub-system373.2.3.18 PCI373.2.3.19 SATA Controller373.2.3.20 Compatibility Modules (DMA Controller, Timer/Counters, Interrupt Controller)373.2.3.21 Advanced Programmable Interrupt Controller (APIC)373.2.3.22 Universal Serial Bus (USB) Controller373.2.3.23 Enhanced Power Management373.3 Memory Sub-System383.3.1 Memory Configuration383.3.2 Memory DIMM Support403.4 I/O Sub-System403.4.1 PCI Subsystem403.4.1.1 P32-A: 32-bit, 33-MHz PCI Sub-system413.4.1.1.1 Device IDs (IDSEL)413.4.1.1.2 Segment A Arbitration413.4.1.2 PCI Interface for Video subsystem423.4.2 Interrupt Routing423.4.2.1 Legacy Interrupt Routing423.4.2.2 APIC Interrupt Routing433.4.2.3 Legacy Interrupt Sources433.4.2.4 Serialized IRQ Support433.4.3 PCI Error Handling443.5 BMC Controller483.6 PCI Express* to PCI-X Bridge 6702PXH (PXH-V) (LX Board SKU Only)503.7 Clock Generator503.8 Super I/O503.9 GigE Controller 82541PI513.10 GigE PHY513.11 On-Board Components513.11.1 Video Support513.11.1.1 Video Modes533.12 Replacing the Back-Up Battery544. System BIOS554.1 BIOS Identification String554.2 Logo / Diagnostic Window564.3 BIOS Setup Utility564.3.1 Operation564.3.1.1 Setup Page Layout564.3.1.2 Entering BIOS Setup574.3.1.3 Keyboard Commands574.3.1.4 Menu Selection Bar584.3.2 Server Platform Setup Screens594.3.2.1 Main Screen594.3.2.2 Advanced Screen624.3.2.2.1 Processor Screen634.3.2.2.2 Memory Screen644.3.2.2.3 SATA Controller Screen664.3.2.2.4 Serial Ports Screen684.3.2.2.5 USB Configuration Screen694.3.2.2.6 PCI Screen714.3.2.3 Security Screen724.3.2.4 Server Management Screen744.3.2.4.1 Console Redirection Screen754.3.2.5 Server Management System Information Screen774.3.2.6 Boot Options Screen784.3.2.6.1 Hard Disk Order Screen794.3.2.6.2 CDROM Order Screen814.3.2.6.3 Floppy Order Screen814.3.2.6.4 Network Device Order Screen824.3.2.6.5 BEV Device Order Screen834.3.2.7 Boot Manager Screen844.3.2.8 Error Manager Screen844.3.2.9 Exit Screen854.3.2.9.1 Fan Speed Control Methodology864.4 Loading BIOS Defaults874.5 Multiple Boot Blocks874.6 Recovery Mode874.7 Intel® Matrix Storage Manager884.8 Intel® Embedded Server RAID Technology II Support885. Error Reporting and Handling895.1 Error Handling and Logging895.1.1 Error Sources and Types895.1.2 Error Logging via SMI Handler905.1.2.1 PCI Bus Error905.1.2.2 PCI Express* Errors905.1.2.3 Memory Errors905.1.3 SMBIOS Type 15905.1.4 Logging Format Conventions905.2 Error Messages and Error Codes925.2.1 Diagnostic LEDs925.2.2 POST Code Checkpoints935.2.3 POST Error Messages and Handling965.2.4 POST Error Beep Codes975.2.5 POST Error Pause Option976. Connectors and Jumper Blocks986.1 Power Connectors986.1.1 Main Power Connector986.2 Intel® Riser Card for L SKU996.3 SMBus Connector996.4 Front Panel Connector996.5 I/O Connectors1006.5.1 VGA Connector1006.5.2 NIC Connectors1006.5.3 SATA Connectors1016.5.4 Floppy Controller Connector1016.5.5 Serial Port Connectors1026.5.6 Keyboard and Mouse Connector1036.5.7 USB Connector1036.6 Fan Headers1046.7 Miscellaneous Headers and Connectors1046.7.1 Back Panel I/O Connectors1046.7.2 Chassis Intrusion Header1056.7.3 HDD Active LED Header1056.7.4 IPMB1056.7.5 HSBP1056.7.6 SATA SGPIO1066.8 Jumper Blocks1066.8.1 CMOS Clear and Password Reset Usage Procedure1066.8.2 BMC Force Update Procedure1077. Absolute Maximum Ratings1087.1 Mean Time Between Failures (MTBF) Test Results1087.2 Calculated Mean Time Between Failures (MTBF)1088. Design and Environmental Specifications1098.1 Power Budget1098.2 Power Supply Specifications1108.2.1 Power Timing Requirements1108.2.2 Dynamic Loading1138.2.3 AC Line Transient Specification1138.2.4 AC Line Fast Transient (EFT) Specification1148.3 Product Regulatory Compliance1148.3.1 Product Safety Compliance1148.3.2 Product EMC Compliance – Class A Compliance1158.3.3 Certifications / Registrations / Declarations1158.3.4 Product Regulatory Compliance Markings1178.4 Electromagnetic Compatibility Notices1188.4.1 FCC (USA)1188.4.2 ICES-003 (Canada)1198.4.3 Europe (CE Declaration of Conformity)1198.4.4 VCCI (Japan)1198.4.5 Taiwan Declaration of Conformity (BSMI)1198.4.6 Korean Compliance (RRL)1208.5 Mechanical Specifications1219. Hardware Monitoring1249.1 Chassis Intrusion124Untitled128Size: 1.73 MBPages: 128Language: EnglishOpen manual