Intel S2400LP User Manuals

Table of Contents

• 1. Introduction

  1
• Section Outline

  1
• Server Board Use Disclaimer

  2
• 2. Server Board Overview

  3
• Figure 1. Intel® Server Board S2400LP (Base SKU)

  3
• Table 1. Intel® Server Board S2400LP Feature Set

  3
• Server Board Connector and Component Layout

  5
• 2.1.1 Board Rear Connector Placement

  5
• Figure 2. Intel® Server Board S2400LP Components

  5
• Server Board Mechanical Drawings

  6
• Figure 3. Rear Panel Connector Placement

  6
• Figure 4. Intel® Server Board S2400LP – Mounting Holes Locations

  6
• Figure 5. Intel® Server Boards S2400LP – Major Connector Pin-1 Locations

  7
• 3. Product Architecture Overview

  8
• High Level Product Features

  8
• Table 2. Intel® Server Board S2400LP Features

  8
• Processor Support

  9
• Figure 6. Intel® Server Boards S2400LP Functional Block Diagram

  9
• Processor Socket Assembly

  10
• Processor Population Rules

  10
• Figure 7. Processor Socket Assembly

  10
• Table 3. Mixed Processor Configurations

  11
• Processor Functions Overview

  13
• Intel®QuickPath Interconnect

  13
• Integrated Memory Controller (IMC) and Memory Subsystem

  14
• Figure 8. Processor with IMC Functional Block Diagram

  14
• Supported Memory

  15
• Table 4. UDIMM Support Guidelines

  15
• Table 5. RDIMM Support Guidelines

  16
• Table 6. LRDIMM Support Guidelines

  16
• Memory Population Rules

  17
• Figure 9. Intel® Server Board S2400LP DIMM Slot Layout

  17
• Publishing System Memory

  18
• RAS Features

  18
• Processor Integrated I/O Module (IIO)

  19
• Riser Card Support

  20
• Table 7. CPU1 and CPU2 PCIe Connectivity

  20
• Riser Types

  21
• Network Interface

  21
• Figure 10. PCIe Riser for Slot 1

  21
• Figure 11. PCIe Riser for Slot 2

  21
• I/O Module Support

  22
• Intel® C600-A/B PCH Functional Overview

  22
• Figure 12. Intel® C600-A/B PCH connection

  22
• Table 8. External RJ45 NIC Port LED Definition

  22
• PCI Express*

  23
• Universal Serial Bus (USB)

  23
• Serial Attached SCSI(SAS) and Serial ATA(SATA) Controller

  23
• Table 9. Intel® Server Board S2400LP SATA/SAS port

  24
• Table 10. Intel® RAID C600 Storage Upgrade Key Options for S2400LP

  24
• PCI Interface

  25
• Low Pin Count (LPC) Interface

  25
• Digital Media Interface (DMI)

  25
• Serials Peripheral Interface (SPI)

  25
• Compatibility Modules (DMA Controller, Timer/Counters, Interrupt Controller)

  25
• Advanced Programmable Interrupt Controller (APIC)

  25
• Real Time Clock (RTC)

  26
• GPIO

  26
• Enhanced Power Management

  26
• Fan Speed Control

  26
• Intel®Virtualization Technology for Direct I/O (Intel®VT-d)

  26
• KVM/Serial Over LAN (SOL) Function

  26
• IDE-R Function

  27
• Manageability

  27
• System Management Bus (SMBus* 2.0)

  27
• Network Interface Controller (NIC)

  28
• 3.4.19.1 MAC Address Definition (TBD)

  28
• Figure 13. 1GbE NIC port LED

  28
• Table 11. NIC Status LED

  28
• 3.4.19.2 LAN Manageability

  29
• 3.4.19.3 Wake-On-LAN

  29
• 3.4.19.4 LAN Connector Ordering

  29
• 3.4.19.5 Intel®I350 Thermal Sensor

  29
• InfiniBand* Controller

  29
• Figure 14. ConnectX®-3 function block diagram

  29
• Device Interfaces

  30
• Quad Small Form-factor Pluggable (QSFP) connector

  30
• Table 12. Network Port Configuration

  30
• Baseboard Management Controller Overview

  31
• Figure 15. Connection between ConnectX®-3 and QSFP

  31
• Figure 16. Integrated BMC implementation overview

  31
• Figure 17. BMC Functional Block Diagram

  32
• Super I/O Controller

  33
• 3.6.1.1 Keyboard and Mouse Support

  33
• 3.6.1.2 Wake-up Control

  33
• Graphics Controller and Video Support

  33
• Table 13. Video Modes

  33
• 3.6.3 Remote KVM

  34
• Table 14. Video mode

  34
• 4. Platform Management Functional Overview

  35
• Baseboard Management Controller (BMC) Firmware Feature Support

  35
• IPMI 2.0 Features

  35
• Non IPMI Features

  35
• New Manageability Features

  37
• Advanced Configuration and Power Interface (ACPI)

  38
• Platform Management SMBus* and I2C Implementation

  38
• Table 15. ACPI Power States

  38
• BMC Internal Timestamp Clock

  39
• Sensor Monitoring

  39
• Messaging Interfaces

  39
• Channel Management

  40
• User Model

  40
• Table 16. Standard Channel Assignments

  40
• Table 17. Default User Values

  40
• Sessions

  41
• Table 18. Channel/Media-specific minimum number of sessions

  41
• BMC LAN Channels

  42
• 4.6.4.1 Baseboard NICs

  42
• 4.6.4.2 Dedicated Management Channel

  42
• 4.6.4.3 Concurrent Server Management Use of Multiple Ethernet Controllers

  42
• IPV6 Support

  43
• 4.6.5.1 LAN Failover

  44
• System Event Log (SEL)

  44
• Servicing Events

  44
• SEL Entry Deletion

  44
• SEL Erasure

  45
• SEL Extension Capabilities

  45
• Sensor Data Record (SDR) Repository

  45
• Field Replaceable Unit (FRU) Inventory Device

  45
• Diagnostics and Beep Code Generation

  45
• Table 19. BMC Beep Codes

  45
• Diagnostics Interrupt (NMI)

  46
• BMC Basic and Advanced Management Features

  46
• Table 20. NMI Signal Generation and Event Logging

  46
• Table 21. Basic and Advanced Management Features

  46
• Enabling Advanced Manageability Features

  47
• Table 22. Management features and Benefits

  47
• 4.12.1.1 Keyboard, Video and Mouse (KVM) Redirection

  48
• 4.12.1.2 Remote Console

  48
• 4.12.1.3 Performance

  48
• 4.12.1.4 Security

  48
• 4.12.1.5 Availability

  48
• 4.12.1.6 Timeout

  49
• 4.12.1.7 Usage

  49
• 4.12.2 Media Redirection

  49
• 4.12.2.1 Availability

  50
• 4.12.2.2 Network Port Usage

  50
• 4.12.3 Embedded Web server

  50
• 4.12.4 Data Center management Interface (DCM)

  51
• 4.12.5 Local Directory Authentication Protocol (LDAP)

  51
• 4.12.6 Platform/Chassis Management

  52
• 4.12.7 Thermal Control

  52
• 4.12.7.1 Fan Speed Control

  52
• 4.12.7.2 System Configuration Using FRUSDR Utility

  53
• 4.12.8 Node Power On/Off Control

  53
• Intel® Intelligent Power Node Manager

  53
• Overview

  53
• Table 23. Fan Profile Mapping

  53
• Features

  54
• Management Engine (ME)

  54
• Overview

  54
• BMC – Management Engine (ME) Distributed Model

  54
• ME System Management Bus (SMBus*) Interface

  55
• Figure 18. Management Engine Distribution Model

  55
• BMC - Management Engine Interaction

  56
• ME Power and Firmware Startup

  56
• SmaRT/CLST

  56
• Other Platform Management

  57
• Wake On LAN (WOL)

  57
• PCI Express* Power management

  57
• PMBus*

  57
• Node Power policies

  57
• BIOS Password Protection

  57
• Trusted Platform Module(TPM) Support

  58
• 4.17.1 TPM Security BIOS

  59
• 4.17.2 Physical Presence

  59
• 4.17.3 TPM Security Setup Options

  60
• 4.17.4 Security Screen

  60
• 4. BIOS Setup Interface

  60
• HotKeys Supported During POST

  60
• Table 24. POST HotKeys Recognized

  60
• POST Logo/Diagnostic Screen

  61
• BIOS Boot Pop-up Menu

  61
• BIOS Setup Utility

  61
• BIOS Setup Operation

  62
• Setup Page Layout

  62
• Table 25. BIOS Setup Page Layout

  62
• Entering BIOS Setup

  63
• Setup Navigation Keyboard Commands

  63
• Table 26. BIOS Setup: Keyboard Command Bar

  63
• Setup Screen Menu Selection Bar

  64
• BIOS Setup Utility Screens

  65
• 5.4.2.1 Map of Screens and Functionality

  65
• Table 27. Screen Map

  65
• 5.4.2.2 Main Screen (Tab)

  67
• Figure 19. Main Screen

  67
• Table 28. Setup Utility – Main Screen Fields

  67
• 5.4.2.3 Advanced Screen (Tab)

  68
• Figure 20. Advanced Screen

  69
• Table 29. Setup Utility – Advanced Screen Display Fields

  69
• 5.4.2.4 Processor Configuration

  70
• Figure 21. Processor Configuration Screen

  70
• Table 30. Setup Utility — Processor Configuration Screen Fields

  71
• 5.4.2.5 Power and Performance Policy

  75
• Figure 22. Power and Performance Configuration Screen

  76
• Table 31. Setup Utility – Power and Performance Configuration Screen Fields

  76
• Table 32. Power/Performance Profiles

  76
• 5.4.2.6 Memory Configuration

  78
• Figure 23. Memory Configuration Screen

  78
• Table 33. Setup Utility – Memory Configuration Screen Fields

  79
• 5.4.2.7 Memory RAS and Performance Configuration

  80
• Figure 24. Memory RAS and Performance Configuration Screen

  80
• 5.4.2.8 Mass Storage Controller Configuration

  81
• Table 34. Setup Utility – Memory RAS and Performance Configuration Fields

  81
• Figure 25. Mass Storage Controller Configuration Screen

  82
• Table 35. Mass Storage Controller Configuration Fields

  82
• 5.4.2.9 PCI Configuration

  83
• Figure 26. PCI Configuration Screen

  83
• Table 36. Setup Utility – PCI Configuration Screen Fields

  84
• 5.4.2.10 NIC configuration

  85
• Figure 27. NIC Configuration Screen Field

  86
• Table36. Setup Utility - NIC Configuration Screen Field

  86
• 5.4.2.11 Serial Port Configuration

  92
• 5.4.2.12 USB Configuration

  92
• Figure 28. Serial Port Configuration Screen

  92
• Table 37. Setup Utility – Serial Ports Configuration Screen Fields

  92
• Figure 29. USB Configuration Screen

  93
• Table 38. Setup Utility – USB Controller Configuration Screen Fields

  93
• 5.4.2.13 System Acoustic and Performance Configuration

  94
• Figure 30. System Acoustic and Performance Configuration

  94
• Table 39. Setup Utility – System Acoustic and Performance Configuration Screen Fields

  95
• 5.4.2.14 Security Screen (Tab)

  97
• Figure 31. Security Screen

  97
• Table 40. Setup Utility – Security Configuration Screen Fields

  98
• 5.4.2.15 Server Management Screen (Tab)

  99
• Figure 32. Server Management Screen

  99
• Table 41. Setup Utility – Server Management Configuration Screen Fields

  99
• 5.4.2.16 Console Redirection

  101
• 5.4.2.17 System Information

  102
• Figure 33. Console Redirection Screen

  102
• Table 42. Setup Utility – Console Redirection Configuration Fields

  102
• Figure 34. System Information Screen

  103
• Table 43. Setup Utility – Server Management System Information Fields

  103
• 5.4.2.18 BMC LAN Configuration

  104
• Figure 35. BMC LAN Configuration Screen

  105
• Table 44. Setup Utility — BMC configuration Screen Fields

  106
• 5.4.2.19 Boot Options Screen (Tab)

  107
• Figure 36. Boot Options Screen

  107
• Table 45. Setup Utility – Boot Options Screen Fields

  107
• 5.4.2.20 Hard Disk Order

  109
• 5.4.2.21 Network Device Order

  109
• Figure 37. Hard Disk Order Screen

  109
• Table 46. Setup Utility — Hard Disk Order Fields

  109
• 5.4.2.22 Delete EFI Boot Option

  110
• Figure 38. Network Device Order Screen

  110
• Figure 39. Delete EFI Boot Option Screen

  110
• Table 47. Setup Utility — Network Device Order Fields

  110
• Table 48. Setup Utility – Delete Boot Option Fields

  110
• 5.4.2.23 Boot Manager Screen (Tab)

  111
• 5.4.2.24 Error Manager Screen (Tab)

  111
• Figure 40. Boot Manager Screen

  111
• Table 49. Setup Utility – Boot Manager Screen Fields

  111
• 5.4.2.25 Save and Exit Screen (Tab)

  112
• Figure 41. Error Manager Screen

  112
• Figure 42. Exit Screen

  112
• Table 50. Setup Utility — Error Manager Screen Fields

  112
• Table 51. Setup Utility — Exit Screen Fields

  112
• Loading BIOS Defaults

  113
• 5. Configuration Jumpers

  114
• Figure 43: Jumper Blocks (J9C2, J9F2, J6E1, J6E1, J6E1, J6E1)

  114
• Table 52. Server Board Jumpers (J9C2, J9F2, J6E1, J6E1, J6E1, J6E1)

  114
• Force BMC Update (J9C2)

  115
• BIOS Recovery Mode (J9F2)

  115
• Table 53. Force BMC Update Jumper

  115
• Password Clear (J6E1)

  116
• Table 54. BIOS Recovery Mode Jumper

  116
• Table 55. Password Clear Jumper

  116
• Force ME Update (J6E1)

  117
• Table 56. Force ME Update Jumper

  117
• Reset BIOS Settings (J6E1)

  118
• Table 57. Reset BIOS Jumper

  118
• 6. Connector/Header Locations and Pin-out

  119
• Power Connectors

  119
• System Management Headers

  119
• Intel®Remote Management Module 4 (Intel®RMM4 Lite) Connector

  119
• Bridge Board Connector

  119
• Table 58. Main Power Supply Connector 6-pin 2x3 Connector (J1D1 and J1A2)

  119
• Table 59. Intel® RMM4 Lite Connector Pin-out (J7F2)

  119
• Table 60. Bridge Board Connector (J6A1)

  119
• Power Button

  120
• Reset Button

  121
• Chassis Identify Button

  121
• Power LED

  121
• System Status LED

  121
• Table 61. Power LED Indicator States

  121
• Figure 44. System Status LED (A) and ID LED (B)

  122
• Table 62. System Status LED

  122
• Chassis ID LED

  123
• I/O Connectors

  124
• PCI Express* Connectors

  124
• Table 63. Chassis ID LED Indicator States

  124
• Table 64. PCI Express* x16 Riser Slot 1 Connector (J8F1)

  124
• Table 65. PCI Express* x8 Riser Slot 2 Connector (J8A1)

  126
• VGA Connector

  128
• NIC Connectors

  128
• Table 66. PCI Express* Riser ID Assignment

  128
• Table 67. VGA External Video Connector (J9D1)

  128
• SATA DOM Connectors

  129
• Storage Upgrade Key Connector

  129
• Table 68. RJ-45 10/100/1000 NIC Connector Pin-out (JA9F1, JA9E1)

  129
• Table 69. SATA DOM Connector

  129
• Table 70. Storage Upgrade Key Connector (J9F1)

  129
• Serial Port Connectors

  130
• USB Connectors

  130
• QSFP for InfiniBand*

  130
• Table 71. Internal 9-pin Serial A (COM1) (J8F5)

  130
• Table 72. External USB port Connector (J9C1)

  130
• Table 73. QSFP Pin Definition

  130
• Fan Headers

  131
• Table 74. Baseboard Fan Connector (J1A1)

  131
• 7. Intel Light-Guided Diagnostics

  132
• Front Panel Support

  132
• System ID LED

  132
• System Status LED

  132
• Network Link/Activity LED

  132
• Table 75. Network link/activity LED

  132
• 8.1.4 Dedicated InfiniBand* Link/Activity LED

  133
• POST Code Diagnostic LEDs

  133
• Table 76. InfiniBand* link/activity LED

  133
• Figure 45. Rear Panel Diagnostic LEDs (Block A)

  134
• 8. Environmental Limits Specification

  135
• Processor Thermal Design Power (TDP) Support

  135
• Table 77. Server Board Design Specifications

  135
• 9. Power Supply Specification Guidelines

  136
• Power Supply DC Output Connector

  136
• Power Supply DC Output Specification

  136
• Output Power/Currents

  136
• Standby Output

  136
• Voltage Regulation

  136
• Table 78. Power Supply DC Power Input Connector Pinout (See Table 60)

  136
• Table 79. Minimum Load Ratings

  136
• Table 80. Voltage Regulation Limits

  136
• Dynamic Loading

  137
• Capacitive Loading

  137
• Grounding

  137
• Closed loop stability

  137
• Residual Voltage Immunity in Standby mode

  137
• Table 81. Transient Load Requirements

  137
• Table 82. Capacitive Loading Conditions

  137
• Common Mode Noise

  138
• 10.2.10 Soft Starting

  138
• 10.2.11 Zero Load Stability Requirements

  138
• 10.2.12 Hot Swap Requirements

  138
• 10.2.13 Forced Load Sharing

  138
• 10.2.14 Ripple/Noise

  138
• 10.2.15 Timing Reuqirement

  138
• Table 83. Ripples and Noise

  138
• Figure 46. Turn On/Off Timing (Power Supply Signals)

  139
• Table 84. Timing Requirements

  139
• Appendix A: Integration and Usage Tips

  141
• Appendix B: Integrated BMC Sensor Tables

  142
• Table 85. BMC Sensor Table

  144
• Appendix C: BIOS Sensors and SEL Data

  155
• Table 86. BIOS Sensor and SEL Data

  155
• Appendix D: POST Code LED Decoder

  161
• Figure 47. Diagnostic LED Placement Diagram

  161
• Table 87. POST Progress Code LED Example

  162
• Table 88. Diagnostic LED POST Code Decoder

  163
• Appendix E: Video POST Code Errors

  168
• Table 89. POST Error Messages and Handling

  168
• Glossary

  172
• Table 90. Glossary

  172
• Reference Documents

  175