Intel S2400GP2 User Manuals

Table of Contents

• 1. Introduction

  1
• Chapter Outline

  1
• Server Board Use Disclaimer

  1
• 2. Overview

  2
• Intel® Server Boards S2400GP Feature Set

  2
• Table 1. Intel® Server Boards S2400GP Feature Set

  2
• Server Board Layout

  4
• Server Board Connector and Component Layout

  4
• Figure 1. Intel® Server Board S2400GP Layout (S2400GP4 as example)

  4
• Figure 2. Intel® Server Board S2400GP Components

  5
• Table 2. Intel® Server Boards S2400GP Components

  6
• Server Board Mechanical Drawings

  7
• Figure 3. Major Board Components

  7
• Figure 4. Intel® Server Board S2400GP – Mounting Hole Locations (1 of 2)

  8
• Figure 5. Intel® Server Board S2400GP – Mounting Hole Locations (2 of 2)

  9
• Figure 6. Intel® Server Boards S2400GP – Major Connector Pin-1 Locations (1 of 3)

  10
• Figure 7. Intel® Server Boards S2400GP – Major Connector Pin-1 Locations (2 of 3)

  11
• Figure 8. Intel® Server Boards S2400GP – Major Connector Pin-1 Locations (2 of 3)

  12
• Figure 9. Intel® Server Boards S2400GP – Primary Side Keep-out Zone

  13
• Figure 10. Intel® Server Boards S2400GP – Primary Side Card Side Keep-out Zone

  14
• Server Board Rear I/O Layout

  15
• Figure 11. Intel® Server Boards S2400GP – Second Side Keep-out Zone

  15
• Figure 12. Intel® Server Boards S2400GP Rear I/O Layout

  16
• 3. Functional Architecture

  17
• Processor Support

  17
• Figure 13. Intel® Server Board S2400GP Functional Block Diagram

  17
• Processor Socket Assembly

  18
• Processor Population rules

  18
• Figure 14. Processor Socket Assembly

  18
• Table 3. Mixed Processor Configurations

  19
• Processor Function Overview

  22
• Intel® QuickPath Interconnect

  23
• Integrated Memory Controller (IMC) and Memory Subsystem

  23
• 3.6.1 Supported Memory

  24
• Table 4. UDIMM Support Guidelines

  24
• Table 5. RDIMM Support Guidelines

  25
• Table 6. LRDIMM Support Guidelines

  25
• 3.6.2 Memory population rules

  26
• Table 7. Intel® Server Board S2400GP DIMM Nomenclature

  26
• Figure 15. Intel® Server Board S2400GP DIMM Slot Layout

  27
• 3.6.3 Publishing System Memory

  28
• 3.6.4 RAS Features

  29
• Processor Integrated I/O Module (IIO)

  33
• 3.7.1 Network Interface

  34
• Figure 16. Functional Block Diagram of Processor IIO Sub-system

  34
• Intel® C600-A Chipset Functional Overview

  35
• Table 8. External RJ45 NIC Port LED Definition

  35
• Figure 17. Functional Block Diagram – Chipset Supported Features and Functions

  36
• 3.8.1 Digital Media Interface (DMI)

  37
• 3.8.2 PCI Express* Interface

  37
• 3.8.3 Serial ATA (SATA) Controller

  37
• 3.8.4 AHCI

  37
• 3.8.5 Rapid Storage Technology

  37
• 3.8.6 PCI Interface

  38
• 3.8.7 Low Pin Count (LPC) Interface

  38
• 3.8.8 Serial Peripheral Interface (SPI)

  38
• 3.8.9 Compatibility Modules (DMA Controller, Timer/Counters, Interrupt Controller)

  38
• 3.8.10 Advanced Programmable Interrupt Controller (APIC)

  38
• 3.8.11 Universal Serial Bus (USB) Controller

  39
• 3.8.12 Gigabit Ethernet Controller

  39
• 3.8.13 RTC

  39
• 3.8.14 GPIO

  39
• 3.8.15 Enhanced Power Management

  39
• 3.8.16 Manageability

  40
• 3.8.17 System Management Bus (SMBus* 2.0)

  40
• 3.8.18 Intel® Active Management Technology (Intel® AMT)

  40
• 3.8.19 Integrated NVSRAM Controller

  41
• 3.8.20 Intel® Virtualization Technology for Direct I/O (Intel® VT-d)

  41
• 3.8.21 JTAG Boundary-Scan

  41
• 3.8.22 KVM/Serial Over LAN (SOL) Function

  41
• Table 9. Intel® RAID C600 Upgrade Key Options

  42
• 3.8.24 Intel® Embedded Server RAID Technology 2 (ESRT2)

  43
• 3.8.25 Intel® Rapid Storage Technology (RSTe)

  43
• Figure 18. Integrated Baseboard Management Controller (BMC) Overview

  44
• Super I/O Controller

  45
• 3.10.1 Keyboard and Mouse Support

  45
• 3.10.2 Wake-up Control

  45
• Graphics Controller and Video Support

  45
• Figure 19. Integrated BMC Hardware

  45
• Table 10. Video Modes

  45
• Baseboard Management Controller

  46
• Table 11. Video mode

  46
• 3.12.1 Remote KVMS Support

  47
• 3.12.2 Integrated BMC Embedded LAN Channel

  47
• 4 System Security

  49
• BIOS Password Protection

  49
• Trusted Platform Module (TPM) Support

  50
• TPM security BIOS

  50
• 4.3.1 Physical Presence

  51
• 4.3.2 TPM Security Setup Options

  51
• 4.3.3 Security Screen

  52
• Figure 20. Setup Utility – TPM Configuration Screen

  52
• Intel® Trusted Execution Technology

  53
• Table 12. TPM Setup Utility – Security Configuration Screen Fields

  53
• 5 Technology Support

  55
• Intel® Trusted Execution Technology

  55
• Intel® Virtualization Technology – Intel® VT-x/VT-d/VT-c

  55
• Intel® Intelligent Power Node Manager

  56
• Table 13. Intel® Intelligent Power Node Manager

  56
• 5.3.1 Hardware Requirements

  57
• 6 Platform Management Functional Overview

  58
• Baseboard Management Controller (BMC) Firmware Feature Support

  58
• 6.1.1 IPMI 2.0 Features

  58
• 6.1.2 Non IPMI Features

  59
• 6.1.3 New Manageability Features

  60
• Basic and Advanced Features

  61
• Table 14. Basic and Advanced Features

  61
• Integrated BMC Hardware: Emulex* Pilot III

  62
• 6.3.1 Emulex* Pilot III Baseboard Management Controller Functionality

  62
• Advanced Configuration and Power Interface (ACPI)

  63
• Table 15. ACPI Power States

  63
• Power Control Sources

  64
• BMC Watchdog

  64
• Table 16. Power Control Initiators

  64
• Fault Resilient Booting (FRB)

  65
• Sensor Monitoring

  65
• Field Replaceable Unit (FRU) Inventory Device

  66
• System Event Log (SEL)

  66
• System Fan Management

  66
• 6.11.1 Thermal and Acoustic Management

  67
• 6.11.2 Fan Profiles

  67
• Table 17. Fan Profiles

  68
• 6.11.3 Thermal Sensor Input to Fan Speed Control

  69
• 6.11.4 Memory Thermal Throttling

  70
• Figure 21. Fan Speed Control Process

  70
• Messaging Interfaces

  71
• 6.12.1 User Model

  71
• 6.12.2 IPMB Communication Interface

  71
• Table 18. Messaging Interfaces

  71
• 6.12.3 LAN Interface

  72
• 6.12.4 Address Resolution Protocol (ARP)

  78
• 6.12.5 Internet Control Message Protocol (ICMP)

  78
• 6.12.6 Virtual Local Area Network (VLAN)

  78
• 6.12.7 Secure Shell (SSH)

  79
• 6.12.8 Serial-over-LAN (SOL 2.0)

  79
• 6.12.9 Platform Event Filter (PEF)

  79
• Table 19. Factory Configured PEF Table Entries

  79
• 6.12.10 LAN Alerting

  80
• 6.12.11 Alert Policy Table

  80
• 6.12.12 SM-CLP (SM-CLP Lite)

  80
• 6.12.13 Embedded Web Server

  81
• 6.12.14 Virtual Front Panel

  83
• 6.12.15 Embedded Platform Debug

  84
• 6.12.16 Data Center Management Interface (DCMI)

  86
• 6.12.17 Lightweight Directory Authentication Protocol (LDAP)

  86
• Table 20. Diagnostic Data

  86
• 7 Advanced Management Feature Support (RMM4)

  88
• Figure 22. Intel® RMM4 Lite Activation Key Installation

  88
• Table 22. RMM4 Option Kits

  88
• Keyboard, Video, Mouse (KVM) Redirection

  89
• Figure 23. Intel® RMM4 Dedicated Management NIC Installation

  89
• Remote Console

  90
• Performance

  90
• Security

  91
• Availability

  91
• Usage

  91
• Force-enter BIOS Setup

  91
• Media Redirection

  91
• Availability

  92
• Network Port Usage

  92
• 8 On-board Connector/Header Overview

  93
• Board Connector Information

  93
• Table 23. Board Connector Matrix

  93
• Power Connectors

  94
• Table 24. Main Power Connector Pin-out

  94
• Table 25. CPU 1/CPU 2 Power Connector Pin-out

  94
• System Management Headers

  95
• Intel® Remote Management Module 4 Connector

  95
• Table 26. Power Supply Auxiliary Signal Connector Pin-out

  95
• Table 27. Intel® RMM4 Connector Pin-out

  95
• TPM connector

  96
• LCP Header

  96
• HSBP Header

  96
• SGPIO Header

  96
• Table 28. Intel® RMM4 – Lite Connector Pin-out

  96
• Table 29. TPM connector Pin-out

  96
• Table 30. LCP Header Pin-out

  96
• Table 31. HSBP_I2C Header Pin-out

  96
• Table 32. SGPIO Header Pin-out

  96
• Front Panel Connector

  97
• I/O Connectors

  97
• VGA Connector

  97
• NIC Connectors

  97
• Table 33. Front Panel SSI Standard 30-pin Connector Pin-out

  97
• Table 34. VGA Connector Pin-out

  97
• SATA Connectors

  98
• Serial Port Connectors

  98
• Table 35. RJ-45 10/100/1000 NIC Connector Pin-out

  98
• Table 36. SATA, MiniSAS SCU-0 and SCU-1 Connector Pin-out

  98
• Table 37. External DB9 Serial A Port Pin-out

  99
• Table 38. Internal 9-pin Serial B Header Pin-out

  99
• USB Connector

  100
• Table 39. External USB Connector Pin-out

  100
• Table 40. Internal USB Connector Pin-out

  100
• Table 41. Pin-out of Internal Low-Profile USB Connector for Solid State Drive

  100
• Fan Headers

  101
• Table 42. Internal Type A USB Port Pin-out

  101
• Table 43. SSI 4-pin Fan Header Pin-out

  101
• Table 44. SSI 6-pin Fan Header Pin-out

  101
• 9 Jumper Blocks

  103
• Figure 24. Jumper Blocks (J1C2, J1C5, J1E2, J2H3, J3H3, J3H4, J3H5, J3H6)

  103
• Table 45. Server Board Jumpers (J1C2, J1E2, J1E4, J1E5, J1H1)

  103
• BIOS Default (CMOS Clear) and Password Clear Usage Procedure

  104
• Clearing CMOS (BIOS default)

  104
• Clearing the Password

  105
• Force BMC Update Procedure

  105
• ME Force Update Jumper

  106
• BIOS Recovery Jumper

  106
• 10 Intel Light Guided Diagnostics

  108
• 5 V Stand-by LED

  108
• Figure 25. 5 V Stand-by Status LED Location

  108
• Fan Fault LEDs

  109
• CPU Fault LEDs

  109
• Figure 26. Fan Fault LED Locations

  109
• System Status LED

  110
• Figure 27. CPU Fault LED Locations

  110
• Figure 28. System Status LED Location

  111
• Table 46. System Status LED

  112
• DIMM Fault LEDs

  113
• Post Code Diagnostic LEDs

  114
• Figure 29. DIMM Fault LEDs Location

  114
• Table 47. BMC Boot/Reset Status LED Indicators

  115
• Figure 30. POST Code Diagnostic LED Locations

  116
• 11 Environmental Limits Specification

  117
• Processor Thermal Design Power (TDP) Support

  117
• Table 48. Server Board Design Specifications

  117
• MTBF

  118
• Server Board Power Distribution

  118
• Table 49. MTBF Estimate

  118
• Figure 31. Power Distribution Block Diagram

  119
• Appendix A: Integration and Usage Tips

  120
• Appendix B: BMC Sensor Tables

  121
• Table 50. Integrated BMC Core Sensors

  123
• Appendix C: POST Code Diagnostic LED Decoder

  129
• Figure 32. POST Code Diagnostic LEDs

  129
• Table 51. POST Progress Code LED Example

  130
• Table 52. POST Progress Codes

  130
• Table 53. MRC Progress Codes

  132
• Table 54. POST Progress LED Codes

  133
• Appendix D: POST Code Errors

  134
• Table 55. POST Error Codes and Messages

  135
• Table 56. POST Error Beep Codes

  138
• Table 57. Integrated BMC Beep Codes

  139
• Appendix E: Supported Intel® Server Chassis

  140
• Table 58. Intel® Server Chassis P4000M family

  140
• Glossary

  142
• Reference Documents

  146