User ManualTable of ContentsFeatures1Functional Description1Logic Block Diagram1Pin Configurations2Device Operation3SRAM READ3SRAM WRITE3AutoStore® Operation3Hardware STORE (HSB) Operation3Hardware RECALL (Power Up)4Software STORE4Software RECALL4Data Protection4Noise Considerations4Low Average Active Power5Best Practices5Real Time Clock Operation7nvTIME Operation7Clock Operations7Reading the Clock7Setting the Clock7Backup Power7Stopping and Starting the Oscillator7Calibrating the Clock8Alarm8Watchdog Timer8Power Monitor9Interrupts9Interrupt Register9When an enabled interrupt source activates the INT pin, an external host reads the Flags registers to determine the cause. Remem...9Flags Register9Maximum Ratings15Operating Range15DC Electrical Characteristics15Data Retention and Endurance16Capacitance16Thermal Resistance16AC Test Conditions16AC Switching Characteristics17AC Switching Characteristics (continued)18AutoStore or Power Up RECALL19Software Controlled STORE/RECALL Cycles [21, 22]20Hardware STORE Cycle21Soft Sequence Commands21RTC Characteristics22Truth Table For SRAM Operations22Part Numbering Nomenclature23Ordering Information24Package Diagrams25Document History Page26Sales, Solutions, and Legal Information28Worldwide Sales and Design Support28Products28PSoC Solutions28Size: 790 KBPages: 28Language: EnglishOpen manual
