Intel 253668-032US User Manual
Vol. 3 15-25
MACHINE-CHECK ARCHITECTURE
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S (Signaling) flag, bit 56 - Indicates (when set) that a machine check exception
was generated for the UCR error reported in this MC bank and system software
needs to check the AR flag and the MCA error code fields in the
IA32_MCi_STATUS register to identify the necessary recovery action for this
error. When the S flag in the IA32_MCi_STATUS register is clear, this UCR error
was not signaled via a machine check exception and instead was reported as a
corrected machine check (CMC). System software is not required to take any
recovery action when the S flag in the IA32_MCi_STATUS register is clear.
was generated for the UCR error reported in this MC bank and system software
needs to check the AR flag and the MCA error code fields in the
IA32_MCi_STATUS register to identify the necessary recovery action for this
error. When the S flag in the IA32_MCi_STATUS register is clear, this UCR error
was not signaled via a machine check exception and instead was reported as a
corrected machine check (CMC). System software is not required to take any
recovery action when the S flag in the IA32_MCi_STATUS register is clear.
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AR (Action Required) flag, bit 55 - Indicates (when set) that MCA error code
specific recovery action must be performed by system software at the time this
error was signaled. This recovery action must be completed successfully before
any additional work is scheduled for this processor When the RIPV flag in the
IA32_MCG_STATUS is clear, an alternative execution stream needs to be
provided; when the MCA error code specific recovery specific recovery action
cannot be successfully completed, system software must shut down the system.
When the AR flag in the IA32_MCi_STATUS register is clear, system software may
still take MCA error code specific recovery action but this is optional; system
software can safely resume program execution at the instruction pointer saved
on the stack from the machine check exception when the RIPV flag in the
IA32_MCG_STATUS register is set.
specific recovery action must be performed by system software at the time this
error was signaled. This recovery action must be completed successfully before
any additional work is scheduled for this processor When the RIPV flag in the
IA32_MCG_STATUS is clear, an alternative execution stream needs to be
provided; when the MCA error code specific recovery specific recovery action
cannot be successfully completed, system software must shut down the system.
When the AR flag in the IA32_MCi_STATUS register is clear, system software may
still take MCA error code specific recovery action but this is optional; system
software can safely resume program execution at the instruction pointer saved
on the stack from the machine check exception when the RIPV flag in the
IA32_MCG_STATUS register is set.
Both the S and the AR flags in the IA32_MCi_STATUS register are defined to
be sticky bits, which mean that once set, the processor does not clear them.
Only software and good power-on reset can clear the S and the AR-flags.
Both the S and the AR flags are only set when the processor reports the UCR
errors (MCG_CAP[24] is set).
15.6.3
UCR Error Classification
With the S and AR flag encoding in the IA32_MCi_STATUS register, UCR
errors can be classified as:
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Uncorrected no action required (UCNA) - is a UCR error that is not signaled via a
machine check exception and, instead, is reported to system software as a
corrected machine check error. UCNA errors indicate that some data in the
system is corrupted, but the data has not been consumed and the processor
state is valid and you may continue execution on this processor. UCNA errors
require no action from system software to continue execution. A UNCA error is
indicated with UC=1, PCC=0, S=0 and AR=0 in the IA32_MCi_STATUS register.
machine check exception and, instead, is reported to system software as a
corrected machine check error. UCNA errors indicate that some data in the
system is corrupted, but the data has not been consumed and the processor
state is valid and you may continue execution on this processor. UCNA errors
require no action from system software to continue execution. A UNCA error is
indicated with UC=1, PCC=0, S=0 and AR=0 in the IA32_MCi_STATUS register.
•
software recoverable action optional (SRAO) - a UCR error is signaled via a
machine check exception and a system software recovery action is optional and
not required to continue execution from this machine check exception. SRAO
errors indicate that some data in the system is corrupt, but the data has not been
consumed and the processor state is valid. SRAO errors provide the additional
error information for system software to perform a recovery action. An SRAO
error is indicated with UC=1, PCC=0, S=1, EN=1 and AR=0 in the
machine check exception and a system software recovery action is optional and
not required to continue execution from this machine check exception. SRAO
errors indicate that some data in the system is corrupt, but the data has not been
consumed and the processor state is valid. SRAO errors provide the additional
error information for system software to perform a recovery action. An SRAO
error is indicated with UC=1, PCC=0, S=1, EN=1 and AR=0 in the